منابع مشابه
New Self-Checking Booth Multipliers
This work presents the first self-checking Booth-3 multiplier and a new self-checking Booth-2 multiplier using parity prediction. We propose a method which combines error-detection of Booth-3 (or Booth-2) decoder cells and parity prediction. Additionally, code disjointness is ensured by reusing logic for partial product generation. Parity prediction is applied to a carry-save-adder with the sta...
متن کاملEffective Built-In Self-Test for Booth Multipliers
0740-7475/98/$10.00 © 1998 IEEE 105 MODULE GENERATORS PROVIDED by library vendors supply chip designers with optimized Booth multipliers, which are widely used as embedded cores in both generalpurpose data path structures and specialized digital signal processors. Designers frequently use Booth multipliers in areaand speedcritical parts of complex ICs. Compared to standard array multipliers, Bo...
متن کاملC-Testable modified-Booth multipliers
In this paper the testability of modified-Booth array multipliers for standard cells based design environments is examined for first time. In such cases the structure of the cells may be unknown, thus Cell Fault Model (CFM) is adopted. Two C-testable designs are proposed. A design for an Nx x Ny bits modified-Booth multiplier, which uses ripple carry addition at the last stage of the multiplica...
متن کاملAdaptive Low-Error Fixed-Width Booth Multipliers
In this paper, we propose two 2’s-complement fixed-width Booth multipliers that can generate an n-bit product from an n-bit multiplicand and an n-bit multiplier. Compared with previous designs, our multipliers have smaller truncation error, less area, and smaller time delay in the critical paths. A four-step approach is adopted to search for the best errorcompensation bias in designing a multip...
متن کاملParallelized Booth-Encoded Radix-4 Montgomery Multipliers
This paper proposes two parallelized radix-4 scalable Montgomery multiplier implementations. The designs do not require precomputed hard multiples of the operands, but instead uses Booth encoding to compute products. The designs use a novel method for propagating the sign bits for negative partial products. The first design right shifts operands to reduce critical path length when using Booth e...
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ژورنال
عنوان ژورنال: International Journal of Applied Mathematics and Computer Science
سال: 2008
ISSN: 1641-876X
DOI: 10.2478/v10006-008-0029-4